Paper’s thesis

  • Datacenter microservices exhibit short, recurring phases with different bottlenecks, so a server should dynamically move its execution among resource-specialized chiplets.
  • HW can predict upcoming phase from low-level, application-agnostic signals; SW retains scheduling authority and accounts for system load and migration cost; a clean HW-SW decomposition.

Key techniques

Phase prediction with fixed-function HW

  • Prediction inputs (15 features): Include HW counters (e.g., IPC and cache/TLB/branch MPKI) and SW activity (e.g., frequencies of categorized system calls such as memory-allocation).
  • Offline-trained Random Forrest: The trained samples are obtained by running representative microservice micro-benchmarks on the four chiplet types—Compute, Memory, Network, and Low power. Each sample is labeled with best-performing chiplet type.
  • Online inference: Each core is augmented with a lightweight, fixed function HW that loads the trained predictor. At every 100-µs epoch, the thread’s phase for the next epoch is predicted.

Actual migration with SW/OS

  • OS combines the HW-predicted phase, expected performance of that phase on each chiplet type, current load of each chiplet (exposed through task-count registers), estimated migration cost, and residency time on current chiplet (to suppress oscillation from noisy predictions).
  • It may deliberately select a nominally suboptimal chiplet when the best chiplet is overloaded.

Comments

PhaseWeave presents a clear and well-motivated co-design: fine-grained phase prediction in hardware, followed by load-aware thread migration in the OS. Its strongest contribution is the characterization showing that datacenter workloads exhibit recurring compute-/memory-/network-sensitive phases, which supports the need for multi-dimensional chiplet specialization rather than conventional big.LITTLE designs. The full-simulation evaluation addresses concerns regarding workload-generality, HW cost, prediction accuracy, and migration overhead. Nevertheless, practicality concern remains as the reported gains are from an idealized heterogeneous server (coherent chiplets, cheap migration, and manageable cache-/data-locality disruption).